The Community for Technology Leaders

State of the Journal


Pages: pp. 145-149

It is both an honor and pleasure to report that IEEE Transactions on Computers (TC) has enjoyed yet another successful year in 2009 and, justifiably, it continues to be recognized as one of the flagship publications of the IEEE Computer Society. Our motto “Leading worldwide innovation and technical excellence in computers” defines our mantra with respect to our glorious past (2010 will be the 59th year of publication) and an ever bright future.

In 2009, we have seen the continuation of the growth pattern as experienced over the last few years: The number of submissions is in excess of 650, while maintaining a time-to-first decision at just above three months (93 days to be precise). Overall, the acceptance rate is nearly 30 percent and TC has successfully published numerous Special Sections (SSs) on areas of interest to the readership. Additionally, the 2008 impact factor of TC stands at 2.61, i.e. at its highest level as per IEEE CS records and in the top 10 percent of all ISI-indexed journals in computer-related areas.

The publication queue of TC remains healthy, albeit as Editor-In-Chief I have experienced an increase in the number of submissions that are clearly out-of-scope; I invite potential contributors to make themselves familiar with the goals and objectives of TC, thus avoiding a likely disappointment upon notification due to an early administrative rejection. While every effort is being made to match expertise in the Editorial Board with submissions, this may not always be possible and makes an early decision fair to all parties involved. Hence, do not hesitate to visit the IEEE Computer Society Web site and, in particular, the newly redesigned TC web page (

A further feature of TC is the rigorous and efficient process of manuscript review; the unabated objective of this publication remains the dissemination of results of the highest quality and technical impact. Hence, acceptance is very competitive and can be recommended only upon positive recommendations from all reviewers. As such, revisions are pursued only when supported by public and private comments from reviewers and Associate Editors (AEs); hence a revision is recommended only if a manuscript is considered to have the likely potential of a final acceptance. It is my responsibility as EIC to ensure that while maintaining fairness, the review process proceeds on a timely basis by not incurring unnecessary delays due to either clearly poor quality in incoming submissions and/or the requirement of an excessive delay due to a lengthy revision. In some cases the “Revise and Resubmit” decision is used to alert the authors of the deficiencies of a manuscript early on, while enticing them to further pursue an additional submission of their revised work. In my opinion, acceptance criteria will continue in the future to be more stringent, thus further increases in the paper rejection rate should be expected.

The role of an EIC is certainly not an easy one; as the number of submissions to TC increases, my load and commitment have also increased. Throughout my appointment I have replied to authors with celerity to clarify their concerns, while preserving the confidentiality of the review process; however, do not hesitate to directly contact the AE in charge of your manuscript if a more detailed assessment of its status is required. Recently, the IEEE Computer Society has undergone major restructuring in operation to ensure that the continued satisfaction of all parties will be preserved in the future as we shift to an even more electronic dimension for all facets of publication activities.

During 2009, the Editorial Board of TC has been enlarged in both scope and expertise. Many of our outstanding AEs have completed their terms and, on behalf of the IEEE CS, I would like to thank the following individuals for an outstanding job: Valmir Barbosa, Guiseppe Lipari, Alessandro Mei, C. Siva Ram Murthy, Bharadwaj Veeravalli, Cho-Li Wang, Zhiwei Xu, and Xiaodong Zhang

The following colleagues are the new members of the Editorial Board of TC and their biographies can be found in the next pages: D.R. Avresky , Jianer Chen , Rajiv Gupta, Lizy Kurian John, Ethan Miller, Behrooz Parhami, Micheal Raynal, Jon Weissman, Cheng-Wen Wu, and Jie Wu

I look forward to working with them to further enhance the standing of TC among our technical community and better serve you in the months ahead. I have the uttermost confidence that 2010 will be yet another stellar year for TC and as always, do not hesitate to contact me at for help and clarification related to your manuscript.

Fabrizio Lombardi


About the Authors

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D.R. Avresky has published more than 116 papers, including IEEE Transactions journals papers, in the areas of: network (control, routing, fault tolerance, dynamic reconfiguration, adaptive routing, self-healing, performance analysis, virtual/overlay networks, middleware), wireless sensors networks, software and protocol verification, parallel computers, functional programming, testing and diagnostics. Dr. Avresky has supervised 13 PhD students on the above-mentioned topics. He has been funded by the US National Science Foundation (NSF), Hewlett Packard, Compaq, Tandem, NASA, Motorola Research Labs, Bell Labs, Akamai Tech. Inc., and other institutions in the USA. Dr. Avresky is currently president of the International Research Institute on Autonomic Network Computing (IRIANC), Boston, Massachusetts, USA/ Munich, Germany. He has been holding academic positions at different universities in the USA and Europe and has created research labs in the areas of “Network Computing” and “Fault-Tolerant and High-Performance Parallel Computers” in these academic institutions. Dr. Avresky has been a guest coeditor of five IEEE journals: the IEEE Transactions on Computers, special section on “autonomic network computing,” July 2009; IEEE Transactions on Computers, special issue on “embedded fault-tolerant systems,” February 2002; the IEEE Transactions on Parallel and Distributed Systems, special issue on “dependable network computing,” February 2001; IEEE Micro, special issue on “embedded fault-tolerant systems,” September/October 2001; IEEE Micro, special issue on “embedded fault-tolerant systems,” September/October 1998. In addition, six books and five book chapters have been published: Dependable Network Computing (Kluwer Academic Publishers, 2000), Fault -Tolerant Parallel and Distributed Systems (Kluwer Academic Publishers, 1998), Fault-Tolerant Parallel and Distributed Systems (Computer Society Press, 1995), Hardware and Software Fault-Tolerance in Parallel Computing Systems (Simon & Schuster International Group, 1992); Fault-Tolerant Microprocessor Systems (Jusauthor, 1984); Diagnostics and Reliability of Computers (Jusautor, 1979). Dr. Avresky is a founder, and was a Program/Steering Committee chair of the IEEE International Symposium on Network Computing and Applications (NCA*), Cambridge, Massachusetts, during (2002–2009.), the Annual IEEE International Workshop FTPDS (now DPDNS), held in conjunction with IEEE IPDPS, during 1996-2009, IEEE Workshop on Embedded-Fault Tolerant Systems (EFTS), (1996, Dallas), (1998, Boston) and (2000, Washington, DC.). Dr. Avresky has served as a reviewer for IEEE Transactions journals. He has been a member of the program committees and a reviewer for numerous IEEE conferences.
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Jianer Chen received the BS degree in computer science from Central South University, P. R. China in 1982, and the MS and PhD degrees in computer science from New York University in 1984 and 1987, respectively. He then joined Columbia University, where he received MA, M Phil., and PhD degrees in mathematics in 1989, 1990, and 1990, respectively. Currently, he is a professor of computer science and engineering at Texas A&M University. Dr. Chen has received many awards for his teaching and research in computer science and engineering. He won the Janet Fabri Award for the Best PhD Dissertation at the Courant Institute, New York University in 1988. He received the NSF Research Initiation Award in 1991. He was awarded the TEES Select Young Faculty Award in 1993, the Amoco Faculty Award in 1998, the Eugene E. Webb’43 Faculty Fellow Award in 2003, the E.D. Brockett Professorship Award in 2005, AFS Distinguished Faculty Achievement Award at the college level twice (1998 and 2006), and the AFS Distinguished Faculty Achievement Award at the university level in 2007, all from Texas A&M University. He was also voted by graduate students and awarded the Graduate Teaching Excellence Award in the Department of Computer Science, Texas A&M University, in 2002, 2003, 2005, 2006. Dr. Chen is serving or has served as an Associate Editor for a number of journals, including the Journal of Computer and System Sciences, Journal of Computational Intelligence in Bioinformatics, and Science in China: Information Sciences. He served as a guest editor for journals such as the Journal of Computer and System Sciences, Discrete Applied Mathematics, and Algorithmica. He is also actively involved in organizing international conferences, and has served as a program committee member for many international conferences. He is a Steering Committee Member for the International Workshop on Parameterized and Exact Computation (IWPEC). He was a program committee chair for the Sixth Annual Conference on Theory and Applications of Models of Computation (TAMC ’09), and a program committee chair for the Fourth International Workshop on Parameterized and Exact Computation (IWPEC ’09). His research interests include algorithms and computational optimization, network optimization, computational biology, and computer graphics. He has published extensively in these areas. 
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Rajiv Gupta is a professor of computer science and engineering at the University of California, Riverside. His areas of research interest include architectural and compiler techniques for optimizing performance, power, and memory usage. He has published more than 200 articles in refereed conferences and journals and holds eight US patents. He has supervised the PhD dissertations of 18 students, including two winners of the ACM SIGPLAN Outstanding Doctoral Dissertation Award in the area of programming languages and five recipients of the prestigious NSF CAREER Award. He served on the Technical Advisory Group (TAG) on Networking and Information Technology created by the US President’s Council of Advisors on Science and Technology (PCAST). He received the US National Science Foundation’s (NSF) Presidential Young Investigator Award in 1991 and served as an IEEE Distinguished Visitor for the period of 2000-2002. He is a fellow of the IEEE and the ACM. He served as the program chair for PLDI ’03, HPCA ’03, and LCTES ’05 conferences; program cochair for HiPEAC ’08 conference; general chair for PLDI ’08 conference; and co-general chair for CGO ’05 conference. He has also been appointed as the program chair of CC ’10 conference and general chair of the ASPLOS ’11 conference. He has served on over 80 program committees including those of major conferences in computer architecture (ISCA, MICRO, HPCA, IEEE MICRO Top Picks, ISPASS, ICS, PACT), embedded systems (LCTES, CASES, HiPEAC), and Compilers (PLDI, POPL, CGO, CC, ICCL, PASTE, PEPM). He serves as an associate editor for the ACM Transactions on Architecture and Code Optimization, Parallel Computing Journal, Journal of Embedded Computing, and Computer Languages, Systems and Structures Journal.
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Lizy Kurian John received the PhD degree in computer engineering from The Pennsylvania State University in 1993. She received the bachelor’s degree in electronics and telecommunication from the University of Kerala, India, and the master’s degree in computer engineering from the University of Texas El Paso. She is a professor in the Electrical and Computer Engineering Department at the University of Texas, Austin (UT Austin), and is a UT Austin Engineering Foundation Centennial Teaching Fellow. Prior to joining UT Austin in 1996, she was on the faculty at the University of South Florida, Tampa. Her research interests include computer architecture, performance evaluation, workload characterization, energy efficient computing, reconfigurable architectures, rapid prototyping, field programmable gate arrays, etc. She has published papers in the IEEE Transactions on Computers, IEEE Transactions on VLSI, ACM/IEEE International Symposium on Computer Architecture (ISCA), IEEE Micro Symposium (MICRO), IEEE High Performance Computer Architecture Symposium (HPCA), ACM International Symposium on Low Power Electronics and Design (ISLPED), etc and has patents. Her research has been supported by the US National Science Foundation (NSF), the State of Texas Advanced Technology program, Defense Advanced Research Projects Agency (DARPA), Lockheed Martin, Semiconductor research Corporation (SRC), IBM, Intel, Motorola, DELL, AMD, Samsung, Sun Microsystems and Microsoft Corporations. She is the recipient of an NSF CAREER award, Junior Faculty Enhancement Award from Oak Ridge Associated Universities, IBM Austin Center for Advanced Studies (CAS) Fellowship, UT Austin Engineering Foundation Faculty Award (2001), Halliburton, Brown and Root Engineering Foundation Young Faculty Award (1999), University of Texas Alumni Association Teaching Award (2004), etc. She coauthored the book Digital Systems Design using VHDL (Thomson Publishers), edited the book on Computer Performance Evaluation and Benchmarking (CRC Press), and edited three books on workload characterization. She cofounded the IEEE International Symposium on Workload Characterization (IISWC). She is an IEEE fellow.
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Ethan Miller received the ScB degree from Brown University in 1987 and his PhD degree from the University of California Berkeley in 1995, where he was a member of the RAID project, and has been on the University of California, Santa Cruz (UCSC) faculty since 2000. He is a professor of computer science at the (UCSC), where he is the UCSC director of the NSF-funded Center for Research in Intelligent Storage (CRIS) and the associate director of the Storage Systems Research Center (SSRC). He is a member of the team that designed and implemented the Ceph high-performance distributed file system, and has been very involved with archival storage, leading the POTSHARDS and Pergamum projects. He has written more than 100 papers covering topics such as archival storage, file systems for high-end computing, metadata and information retrieval, file systems for new storage technologies, secure and reliable storage, and distributed systems. His research projects have been funded by the US National Science Foundation (NSF), US Department of Energy, and industry support for the SSRC, and include long-term archival storage systems, metadata, indexing, and security for petabyte-scale storage systems, and file systems for non-volatile RAM technologies. Professor Miller’s broader interests include file systems, parallel and distributed systems, operating systems, and computer security. In addition to research and teaching in computing systems, he has worked with industry to help move research results into commercial use at companies such as Symantec, LSI, and NetApp.
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Behrooz Parhami received the PhD degree in computer science from the University of California, Los Angeles, 1973. He is a professor of electrical and computer engineering at the University of California, Santa Barbara. He has research interests in computer arithmetic, parallel processing, and dependable computing. In his previous position with Sharif (formerly Arya-Mehr) University of Technology in Tehran, Iran (1974-1988), he was involved in educational planning, curriculum development, standardization efforts, technology transfer, and various editorial responsibilities, including a five-year term as editor of Computer Report, a Persian-language computing periodical. His technical publications include more than 250 papers in peer reviewed journals and international conferences, a Persian-language textbook, and an English/Persian glossary of computing terms. Among his publications are three textbooks on parallel processing (Plenum, 1999), computer arithmetic (Oxford, 2000; second edition forthcoming in 2010), and computer architecture (Oxford, 2005). Professor Parhami is a fellow of the IEEE, a chartered fellow of the British Computer Society, a member of the ACM, and a distinguished member of the Informatics Society of Iran, for which he served as a founding member and president during 1979-1984. Professor Parhami serves on the Editorial Boards of the IEEE Transactions Parallel and Distributed Systems, IEEE Transactions Computers, and International Journal of Parallel, Emergent and Distributed Systems. He also chaired IEEE’s Iran Section (1977-1986) and received the IEEE Centennial Medal in 1984. His consulting activities cover the design of high-performance digital systems and associated intellectual property issues.
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Micheal Raynal received an engineer diploma, then he obtained a PhD grant from the CNRS, and defended a PhD (the topic of which was related to synchronization) in 1975. He was then hired as a full-time researcher by IRIA (now INRIA) from 1976 until 1981, where he worked on abstract data types, protection, synchronization, and programming languages. In 1981 he received the ``Doctorat d’Etat’’ degree in computer science. He then moved to Brest, France (namely, ENST de Bretagne, a French engineering school on telecommunications, sister-school of ENST Paris), where, as a professor, he created and managed the Computer Science and Engineering department. In 1984, he moved back to the University of Rennes where, since then, he has been a professor in computer science. At IRISA (CNRS-INRIA-University joint computing research laboratory located in Rennes), he founded a research group on distributed algorithms in 1984. His research interests include distributed algorithms, distributed computing systems, distributed computability, and dependability. His main interest lies in the fundamental principles that underlie the design and the construction of distributed computing systems. He has been Principal Investigator of a number of research grants in these areas (founded by the European community, private companies such as Alcatel, GEC-Alsthom and France-Telecom, or the French government). He has also obtained grants from binational Franco-XX research program, where XX stands for Brazil, Hong-Kong, Israel, Italy, Japan,Mexico, Portugal, and USA (Santa Barbara, Georgia Tech, Kansas State University). He has been invited by more than 25 universities all over the world (Europe, North and South America, Africa, and Asia) to give lectures on distributed algorithms and distributed computing. As of today, he has published 115 papers in journals. These journals cover both theory and practice. Among them, there are the following international journals: the Journal of the ACM, Algorithmica, SIAM Journal of Computing, Acta Informatica, Distributed Computing, The Communications of the ACM, IEEE Transactions on Computers, IEEE Transactions on Software Engineering, IEEE Transactions on Knowledge and Data Engineering, IEEE Transactions on Parallel and Distributed Systems, IEEE Computer, IEEE Software, Theoretical Computer Science, Real-Time Systems Journal, The Computer Journal, etc. He has published more than 240 papers in conferences (ACM STOC, ACM PODC, ACM SPAA, IEEE ICDCS, IEEE DSN, DISC, COCOON, IEEE IPDPS, IEEE SRDS, etc.), and written seven books devoted to parallelism, distributed algorithms and systems (two by the MIT Press, two others by Wiley & Sons). He has been an invited speaker for more than 20 international conferences and workshops His current {it h-index} is 39.
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Jon Weissman received the BS degree from Carnegie-Mellon University in 1984 and the MS and PhD degrees from the University of Virginia in 1989 and 1995, respectively, all in computer science. He is a leading researcher in the area of high performance distributed computing. His involvement dates back to the influential Legion project at the University of Virginia during his PhD work. He is currently an associate professor of computer science at the University of Minnesota, where he leads the Distributed Computing Systems Group. His current research interests are in Grid/Cloud computing, distributed systems, storage, high performance computing, resource management, reliability, and e-science applications. He works primarily at the boundary between applications and systems. He is a senior member of the IEEE. He was PC-chair of HPDC and global-chair (Grid area) of Europar. He has won numerous awards, including an NSF CAREER Award and was named an Honorary Fellow of the College of Science and Engineering at the University of Edinburgh. He has published more than 70 peer-reviewed articles in his research areas. He is currently an associate editor for the Journal of Parallel and Distributed Computing and IEEE Transactions on Parallel and Distributed Systems.
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Cheng-Wen Wu received the BSEE degree in 1981 from National Taiwan University, Taipei, Taiwan, and the MS and PhD degrees in electrical and computer engineering in 1985 and 1987, respectively, from the University of California, Santa Barbara. Since 1988 he has been with the Department of Electrical Engineering, National Tsing Hua University (NTHU), Hsinchu, Taiwan, where he is currently a Tsing Hua Chair Professor. He has served as the director of the university’s Computer and Communications Center from 1996 to 1998, Director of the Technology Service Center from 1998 to 1999, chair of the Electrical Engineering department from 2000 to 2003, Director of the IC Design Technology Center from 2000 to 2005, and dean of the College of Electrical Engineering and Computer Science from 2004 to 2007. He is currently on leave from NTHU, serving as the General Director of the SOC Technology Center (STC), Industrial Technology Research Institute (ITRI). Dr. Wu was the technical program chair of the IEEE Fifth Asian Test Symposium (ATS ’96), the general chair of ATS ’00, and general chair and cochair of the IEEE International Workshop on Memory Technology from 2005 to 2009, general cochair of the IEEE International Symposium on VLSI Design, Automation and Test in 2008 and 2009, organizing committee chair of the IEEE Asian Solid-State Circuits Conference (A-SSCC), as well as chair and/or a member of organizing and/or technical program committees for numerous IEEE technical events. He is the chair of the Editorial Board for the International Journal of Electrical Engineering (IJEE), an editor for the Journal of Electronic Testing: Theory and Applications (JETTA), and an associate editor for IEEE Design and Test of Computers. He was an editor (and later EIC) for IJEE from 2000 to 2006, and in 2001 he edited the International Journal of Electrical Engineering special issue on design and test of system-on-chip. He also was a guest editor of the Journal of Information Science and Engineering (JISE), special issue on VLSI testing. Dr. Wu received the Distinguished Teaching Awards from NTHU in 1996 and 2006, the Outstanding Electrical Engineering Professor Award from the Chinese Institute of Electrical Engineers (CIEE) in 1997, the Distinguished Research Awards from National Science Council in 2000 and 2002, the Industrial Collaboration Awards from the Ministry of Education in 2001 and 2003, the Academic Award from the Ministry of Education in 2005, as well as the Continuous Service Award and Outstanding Contribution Award from the IEEE Computer Society. In 2006, he became a Golden Core Member of the IEEE Computer Society, as well as a Tsing Hua Chair Professor of NTHU. He is interested in design and test of high performance VLSI circuits and systems, as well as quality, reliability, and yield improvement of semiconductor memory devices and systems. Dr. Wu is a life member of the CIEE, life member of Taiwan IC Design Society, and fellow of the IEEE.
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Jie Wu is chairman and a professor at the Department of Computer and Information Sciences, Temple University. From 2006 to 2008, he served at the US National Science Foundation (NSF) as a Program Director in the area of computer networks. From 1989 to 2009, he worked in the Department of Computer Science at Florida Atlantic University to the rank of Distinguished Professor. Dr. Wu’s research interests are in the area of wireless networks and mobile computing, parallel/distributed systems, fault-tolerant computing, and interconnection networks. Since 1989, he has published more than 250 research articles in various journals and conferences. His book Distributed System Design was published by CRC Press and was translated into Chinese. Dr. Wu was the general cochair of IEEE International Parallel and Distributed Processing Symposium (IPDPS) 2008, the Fifth IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS) 2008, and the Third IEEE International Conference on Mobile Ad-hoc and Sensor Systems (MASS) 2006. He served as the program cochair for ICDCN 2008 and IEEE MASS 2004, executive program vice-chair for IEEE ICDCS 2001, and program vice-chair for ICPP 2000. He also served as the panel cochair for IEEE INFOCOM 2010 and ACM MobiCom 2009. He was the Editor-in-Chief of the IASTED International Journal of Computers and Applications. Dr. Wu was on the Editorial Board of the IEEE Transactions on Parallel and Distributed Systems, a guest editor of Computer and the Journal of Parallel and Distributed Computing. He currently serves on the Editorial Board of the IEEE Transactions on Mobile Computing and the Journal of Parallel and Distributed Computing. Dr. Wu is a recipient of the 1996-97, 2001-02, 2006-2007 Researcher of the Year Award at Florida Atlantic University. He is also a recipient of the 1998 Outstanding Achievements Award from IASTED. From 1998 to 2001, he served as an IEEE Computer Society Distinguished Visitor. He is currently the chair of IEEE Technical Committee on Distributed Processing. Dr Wu has given invited lectures and seminars at universities and institutes in Argentina, Australia, Britain, Bulgaria, Canada, China, Dominican Republic, Hong Kong, Italy, Lebanon, Mexico, Poland, Singapore, Spain, Taiwan, and the United States. He is a recipient of the 2006 Outstanding Overseas Young Researcher Award granted by the National Natural Science Foundation of China (NSFC). He is currently an EMC Endowed Visiting Professor in the Department of Computer Science, Tsinghua University. Dr. Wu was the founder and director of the IBM/FAU Computer System Evaluation Laboratory (CSEL) backed in 1989, and has administered over 1 million dollars of grant money from IBM and over 2 million dollars of grant money from Motorola. He has been working with local industries and the South Florida Water Management District on various grants, and has regularly given lectures at various local industries on parallel and distributed computation and wireless networks. Dr. Wu’s current research is funded by several NSF grants. Dr. Wu is a fellow of the IEEE.
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