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TABLE OF CONTENTS
Issue No. 03 - March (vol. 58)
ISSN: 0018-9340
REGULAR PAPERS

A Highly Accurate Method for Assessing Reliability of Redundant Arrays of Inexpensive Disks (RAID) (Abstract)

Jon Elerath , Network Appliance, Sunnyvale
Michael Pecht , University of Maryland, College Park
pp. 289-299

Reducing Area Overhead for Error-Protecting Large L2/L3 Caches (Abstract)

Soontae Kim , University of South Florida, Tampa
pp. 300-310

Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures (Abstract)

Andy Lambrechts , IMEC vzw and KULeuven, Heverlee
Francky Catthoor , IMEC Belgium, Leuven
Diederik Verkest , IMEC vzw, Leuven
Murali Jayapala , IMEC vzw, Heverlee
Praveen Raghavan , IMEC vzw and KULeuven, Heverlee
pp. 311-321

Hardware Designs for Decimal Floating-Point Addition and Related Operations (Abstract)

Michael J. Schulte , University of Wisconsin-Madison, Madison
Nandini Jairam , Intel Corporation, Folsom
John D. Thompson , Cray Inc., Chippewa Falls
Liang-Kai Wang , AMD, Austin
pp. 322-335

Memory MISER: Improving Main Memory Energy Efficiency in Servers (Abstract)

Matthew E. Tolentino , Virginia Polytechnic and State University, Blacksburg
Joseph Turner , Virginia Polytechnic and State University, Blacksburg
Kirk W. Cameron , Virginia Polytechnic and State University, Blacksburg
pp. 336-350

Cooperative Token-Ring Scheduling For Input-Queued Switches (Abstract)

Amir Gourgy , McMaster University, Hamilton
Ted H. Szymanski , McMaster University, Hamilton
pp. 351-364

Fair Round-Robin: A Low Complexity Packet Schduler with Proportional and Worst-Case Fairness (Abstract)

Zhenhai Duan , Florida State University, Tallahassee
Xin Yuan , Florida State University, Tallahassee
pp. 365-379

On the Design of Fault-Tolerant Scheduling Strategies Using Primary-Backup Approach for Computational Grids with Low Replication Costs (Abstract)

Chen-Khong Tham , National University of Singapore, Singapore
Bharadwaj Veeravalli , National University of Singapore, Singapore
Qin Zheng , Institute of High Performance Computing, Agency for Science, Technology and Research, Singapore
pp. 380-393

Enhancing Simulation Accuracy through Advanced Hazard Detection in Asynchronous Circuits (Abstract)

Feng Shi , Yale University, New Haven
Yiorgos Makris , Yale University, New Haven
pp. 394-408

Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling (Abstract)

Sandeep Goel , Magma Design Automation, San Jose
Anuja Sehgal , AMD, Sunnyvale
Krishnendu Chakrabarty , Duke University, Durham
Erik Jan Marinissen , NXP Semiconductors, Eindhoven
pp. 409-423
BRIEF CONTRIBUTIONS

On Spatial Orders and Location Codes (Abstract)

G. Schrack , The University of British Columbia, Vancouver
L. J. Stocco , The University of British Columbia, Vancouver
pp. 424-432
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