Issue No. 01 - January (2009 vol. 58)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2008.124
John D. Villasenor , University of California, Los Angeles, Los Angeles
Dong-U Lee , Mojix, Los Angeles
Fixed-point processors are utilized in an enormous variety of applications, often for tasks that require the evaluation of mathematical functions. We present an automated method for mapping functions to such processors via polynomials that explicitly targets the native word-length of the processor, thereby significantly reducing the execution time relative to commonly used floating-point emulation approaches based on traditional mathematical libraries. The methods presented here also contrast with hand-tuned processor-specific code, which has the potential to deliver efficient implementations but at the cost of significant design time. We describe an automated design flow utilizing multi-word arithmetic to provide overflow protection and precision accurate to one unit in the last place (ulp). Analytical approaches are used to minimize the number of fixed-width operands required for each operation and to ensure that precision requirements are met. This allows automated generation of processor-optimized code and characterization of a design space representing a rich range of tradeoffs among precision, latency, and memory cost.
Cost/performance, High-Speed Arithmetic, Spline and piecewise polynomial interpolation, Elementary function approximation
John D. Villasenor, Dong-U Lee, "Optimized Custom Precision Function Evaluation for Embedded Processors", IEEE Transactions on Computers, vol. 58, no. , pp. 46-59, January 2009, doi:10.1109/TC.2008.124