The Community for Technology Leaders
Green Image
Component failures and planned component replacements cause changes in the topology and routing paths supplied by the interconnection network of a parallel processor system over time. Such changes may require the network to be reconfigured such that the existing routing function is replaced by one which enables packets to reach their intended destinations amid the changes. Efficient reconfiguration methods are desired that allow the network to function uninterruptedly over the course of the reconfiguration process while remaining free from deadlocking behavior. In this paper, we propose, evaluate, and prove deadlock freedom of a new network reconfiguration protocol that overlaps various phases of "static" reconfiguration processes traditionally used in commercial and research systems to provide performance efficiency on par with that of recently proposed "dynamic" reconfiguration processes, but without their complexity. Simulation results show that the proposed Overlapping Static Reconfiguration protocol can reduce reconfiguration time by up to 50%, reduce packet latency by several orders of magnitude, reduce packet dropping by an order of magnitude, and provide unhalted packet injection as compared to traditional static reconfiguration while allowing network throughput similar to dynamic reconfiguration.
Interconnections (Subsystems), I/O and Data Communications, Topology

O. Lysne, J. M. Montanana, J. Duato, T. M. Pinkston, J. Flich and T. Skeie, "An Efficient and Deadlock-Free Network Reconfiguration Protocol," in IEEE Transactions on Computers, vol. 57, no. , pp. 762-779, 2008.
86 ms
(Ver 3.3 (11022016))