Issue No.02 - February (2007 vol.56)
Ravi K. Venkatesan , IEEE
Krishnan Sivasubramanian , IEEE
Eric Rotenberg , IEEE
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TC.2007.37
ZettaRAM™ is a nascent memory technology with roots in molecular electronics. It uses a conventional DRAM architecture except that the conventional capacitor is replaced with a new molecular capacitor. The molecular capacitor has a discrete threshold voltage, above which all molecules are charged and below which all molecules are discharged. Thus, while voltage still controls charging/discharging, the fixed charge deposited on the molecular capacitor is voltage-independent. Charge-voltage decoupling makes it possible to lower voltage from one memory generation to the next while still maintaining the minimum critical charge for reliable operation, whereas DRAM voltage scaling is constrained by charge. Voltage can be scaled inexpensively and reliably by engineering new, more favorable molecules. We analyze how three key molecule parameters influence voltage and then evaluate 23 molecules in the literature. Matching DRAM density and speed, the best molecule yields 61 percent energy savings. While the fixed charge is voltage-independent, speed is voltage-dependent. Thus, voltage is padded for competitive latency. We propose dynamically modulating the padding based on criticality of memory requests, further extending ZettaRAM's energy advantage with negligible system slowdown. Architectural management extends the best molecule's energy savings to 77 percent and extracts energy savings from six otherwise uncompetitive molecules.
DRAM, dynamic voltage scaling, low-power memory, molecular electronics, molecular memory, memory technology.
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Krishnan Sivasubramanian, Eric Rotenberg, "ZettaRAM: A Power-Scalable DRAM Alternative through Charge-Voltage Decoupling", IEEE Transactions on Computers, vol.56, no. 2, pp. 147-160, February 2007, doi:10.1109/TC.2007.37