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A partitioned TCAM-based search engine is presented that increases the packet forwarding rate multiple times over traditional TCAMs. The model works for IPv4 and IPv6 packet forwarding. Unlike the previous art, the improvement is achieved regardless of the incoming traffic pattern. Employing small and private memories that dynamically store popular route prefixes inside the ASIC and taking advantage of the inherent characteristics of Internet traffic to exploit parallelism make this improvement possible. Using four TCAM chips, an embodiment of the proposed model delivered more than six times the throughput of a conventional configuration with equal storage capacity and equal clock rate. Power consumption is also reduced in the new system. Other parameters such as storage density and table update performance are not adversely affected.
System design, throughput increase, Internet packet forwarding engine, ternary content addressable memory, block selection scheme.

R. Panigrahy, M. Nourani, S. Sharma and M. J. Akhbarizadeh, "A TCAM-Based Parallel Architecture for High-Speed Packet Forwarding," in IEEE Transactions on Computers, vol. 56, no. , pp. 58-72, 2007.
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