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TABLE OF CONTENTS
Issue No. 11 - November (vol. 55)
ISSN: 0018-9340

B-Cubing: New Possibilities for Efficient SAT-Solving (Abstract)

D. Babic , Department of Computer Science, University of British Columbia, Vancouver, Canada
J. Bingham , Intel Corporation, Hillsboro, OR
A.J. Hu , Department of Computer Science, University of British Columbia, Vancouver, Canada
pp. 1315-1324

A New Simulation-Based Property Checking Algorithm Based on Partitioned Alternative Search Space Traversal (Abstract)

Qingwei Wu , Cadence, San Jose, CA 95134
M.S. Hsiao , Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, VA
pp. 1325-1334

Simulation-Based Functional Test Generation for Embedded Processors (Abstract)

C.H.-P. Wen , Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA
Li-C Wang , Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA
Kwang-Ting Cheng , Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA
pp. 1335-1343

Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation (Abstract)

S. Fine , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
A. Freund , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
I. Jaeger , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
Y. Mansour , Computer Science Department, Tel-Aviv University, Tel-Aviv, Israel
Y. Naveh , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
A. Ziv , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
pp. 1344-1355

An Optimum Algorithm for Compacting Error Traces for Efficient Design Error Debugging (Abstract)

Chia-Chih Yen , Department of Electronics Engineering, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan 30050, ROC
Jing-Yang Jou , Department of Electronics Engineering, National Chiao-Tung University, 1001 Ta-Hsueh Road, Hsinchu, Taiwan 30050, ROC
pp. 1356-1366

Advanced Analysis Techniques for Cross-Product Coverage (Abstract)

H. Azatchi , Zoran Microelectronics Ltd., Advanced Technology Center, Haifa, Israel
L. Fournier , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
E. Marcus , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
S. Ur , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
A. Ziv , IBM Haifa Research Lab, Haifa University Campus, Haifa, Israel
K. Zohar , Abriplus Ltd., The Ridgeway, Golders Green, London, England
pp. 1367-1379

Multilevel Design Validation in a Secure Embedded System (Abstract)

P. Schaumont , Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, VA
D. Hwang , KeyEye Communications, Irvine, CA
Shenglin Yang , Department of Electrical Engineering, University of California at Los Angeles, Los Angeles, CA
I. Verbauwhede , Department of Electrical Engineering, University of California at Los Angeles, Los Angeles, CA
pp. 1380-1390

Validating Families of Latency Insensitive Protocols (Abstract)

S. Suhaib , Virginia Tech, 302 Wittemore Hall, Blacksburg, VA 24061-0111
D. Mathaikutty , Virginia Tech, 302 Wittemore Hall, Blacksburg, VA 24061-0111
D. Berner , ENSI Bourges, 10 bd Lahitolle, 18020 Bourges, France
S. Shukla , Virginia Tech, 302 Wittemore Hall, Blacksburg, VA 24061-0111
pp. 1391-1401

A Framework for Describing Block Cipher Cryptanalysis (Abstract)

R.C.-W. Phan , Information Security Research (iSECURES) Lab, Swinburne Univerity of Technology (Sarawak Campus), State Complex, Kuching, Malaysia
M.U. Siddiqi , Faculty of Engineering, International Islamic University Malaysia, Kuala Lumpur, Malaysia
pp. 1402-1409

Design and Performance Evaluation of Queue-and-Rate-Adjustment Dynamic Load Balancing Policies for Distributed Networks (Abstract)

Zeng Zeng , Computer Networks and Distributed Systems Laboratory, Department of Electrical and Computer Engineering, The National University of Singapore, Singapore
B. Veeravalli , Computer Networks and Distributed Systems Laboratory, Department of Electrical and Computer Engineering, The National University of Singapore, Singapore
pp. 1410-1422

On the Design of Self-Checking Controllers with Datapath Interactions (Abstract)

P. Oikonomakos , Computer Laboratory, University of Cambridge, William Gates Building, 15 JJ Thomson Avenue, Cambridge, CB3 0FD, UK
M. Zwolinski , School of Electronics and Computer Science, University of Southampton, Southhampton, SO17 1BJ, UK
pp. 1423-1434

Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units (Abstract)

G. Xenoulis , Department of Informatics, University of Piraeus, 80 Karaoli & Dimitriou Street, 18534, Piraeus, Greece
M. Psarakis , Department of Informatics, University of Piraeus, 80 Karaoli & Dimitriou Street, 18534, Piraeus, Greece
D. Gizopoulos , Department of Informatics, University of Piraeus, 80 Karaoli & Dimitriou Street, 18534, Piraeus, Greece
A. Paschalis , Department of Informatics & Telecommunications, University of Athens, Panepistimiopolis, 15784, Athens, Greece
pp. 1449-1457
SPECIAL SECTION ON SIMULATION-BASED DESIGN VALIDATION
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