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Guest Editors' Introduction: Field Programmable Logic and Applications

Peter Y.K. Cheung, IEEE
George A. Constantinides, IEEE
Jose T. de Sousa, IEEE

Pages: pp. 1361-1362


About the Authors

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Peter Y.K. Cheung (M'85-SM'04) received the BSc degree in electrical engineering from Imperial College in 1973. After working at Hewlett Packard for a number of years, he returned to Imperial College as a research assistant and was appointed a lecturer in 1980. He is currently a professor of digital systems and deputy head of the Electrical and Electronic Engineering Department at Imperial College, University of London. His research interests include VLSI architectures for DSP and video processing, reconfigurable computing, embedded systems, and high-level synthesis and optimization of digital systems, particularly those containing field programmable logic. He has coauthored more than 100 publications and two research monographs in these areas and has served on the technical program committee of many international conferences, including ISCAS, FPL, FPT, and DATE. He is a senior member of the IEEE.
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George A. Constantinides (S'96-M'01) received the MEng degree in information systems engineering and the PhD degree in electrical and electronic engineering from Imperial College, University of London, in 1998 and 2001, respectively. He has been a lecturer in digital systems in the Electrical and Electronic Engineering Department of Imperial College since 2002. He is the author of 25 refereed conference and journal papers and the book Synthesis and Optimization of DSP Algorithms (Dordrecht: Kluwer, 2004). His research interests include reconfigurable computing and electronic design automation, with a particular focus on digital signal processing algorithms. He was program cochair of the International Conference on Field-Programmable Logic and Applications in 2003 and serves on the program committees of FPL, FPT, ERSA, and ARC. He was the founding chair of the UK SIGDA chapter, serving as general chair (2001) and technical chair (2002-2003) of its annual workshop. He is a member of the IEEE and the ACM.
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Jose T. de Sousa received the BS and MS degrees in electrical and computer engineering from IST-Technical University of Lisbon, in 1989 and 1992, respectively, and the PhD degree from the Department of Electrical and Electronic Engineering at Imperial College, University of London, in 1998. After working for almost two years as a member of the technical staff at Bell Laboratories-Lucent Technologies, Inc, in Murray Hill, New Jersey, he returned to IST-Technical University of Lisbon in 1999 as an assistant professor in the Department of Electrical and Computer Engineering, where he is currently the head of the Software/Configware Algorithms Group. He is coauthor of Boundary-Scan Interconnect Diagnosis (Dordrecht: Kluwer, 2004),and coeditor of Field Programmable Logic and Applications (Springer Verlag, 2003). He has written more than 40 technical papers in the areas of electronic testing and reconfigurable logic. He is a steering committee and a program committee member of the International Conference on Field Programmable Logic and Applications, of which he was general chair in 2003. He has been a program committee member of the North Atlantic Test Workshop (NATW) and of the International Workshop on Applied Reconfigurable Computing (ARC) since 1999 and 2004, respectively. He is member of the IEEE and AES.
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