Issue No. 11 - November (2003 vol. 52)
Shlomo Weiss , IEEE
<p><b>Abstract</b>—We introduce a new PLA-based decoder architecture for random-access runtime decompression of compressed instruction memory in embedded systems. The compression method employs class-based coding. The symbol codebook used for decompression is fully programmable; thus, good compression may be achieved by adapting the codebook to the symbol frequency statistics of the target binary program. We show that this new class-based decoder architecture can be extended to provide high throughput decompression.</p>
Embedded processors, code compression, decompressor architecture.
S. Beren and S. Weiss, "Class-Based Decompressor Design for Compressed Instruction Memory in Embedded Processors," in IEEE Transactions on Computers, vol. 52, no. , pp. 1495-1500, 2003.