Issue No. 09 - September (2002 vol. 51)
<p><b>Abstract</b>—Enhanced pipeline scheduling (EPS) is a software pipelining technique which can achieve a <it>variable</it> initiation interval (II) for loops with control flow via its code motion pipelining. EPS, however, leaves behind many renaming copy instructions that cannot be coalesced due to interferences. These copies take resources and, more seriously, they may cause a stall if they rename a multilatency instruction whose latency is longer than the II aimed for by EPS. This paper proposes a code transformation technique based on loop unrolling which makes those copies coalescible. Two unique features of the technique are its method of determining the precise unroll amount, based on an idea of <it>extended live ranges</it>, and its insertion of special bookkeeping copies at loop exits. The proposed technique enables EPS to avoid a serious slowdown from latency handling and resource pressure, while keeping its variable II and other advantages. In fact, renaming through copies, followed by unroll-based copy elimination, is EPS's solution to the cross-iteration register overwrite problem in software pipelining. It works for loops with arbitrary control flow that EPS must deal with, as well as for straightline loops. Our empirical study performed on a VLIW testbed with a two-cycle load latency shows that 86 percent of the otherwise uncoalescible copies in innermost loops become coalescible when unrolled 2.2 times on average. In addition, it is demonstrated that the unroll amount obtained is precise and the most efficient. The unrolled version of the VLIW code includes fewer no-op VLIWs caused by stalls, improving the performance by a geometric mean of 18 percent on a 16-ALU machine.</p>
Software pipelining, enhanced pipeline scheduling, renaming, unrolling, coalescing, modulo scheduling, modulo variable expansion, register allocation, iterated coalescing.
S. Kim, S. Moon, J. Park and K. Ebcioglu, "Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling," in IEEE Transactions on Computers, vol. 51, no. , pp. 977-994, 2002.