Issue No. 07 - July (2000 vol. 49)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.863033
<p><b>Abstract</b>—A new IEEE compliant floating-point rounding algorithm for computing the rounded product from a carry-save representation of the product is presented. The new rounding algorithm is compared with the rounding algorithms of Yu and Zyner [<ref type="bib" rid="bibT063826">26</ref>] and of Quach et al. [<ref type="bib" rid="bibT063817">17</ref>]. For each rounding algorithm, a logical description and a block diagram is given, the correctness is proven, and the latency is analyzed. We conclude that the new rounding algorithm is the fastest rounding algorithm, provided that an injection (which depends only on the rounding mode and the sign) can be added in during the reduction of the partial products into a carry-save encoded digit string. In double precision format, the latency of the new rounding algorithm is <tmath>$12$</tmath> logic levels compared to <tmath>$14$</tmath> logic levels in the algorithm of Quach et al. and <tmath>$16$</tmath> logic levels in the algorithm of Yu and Zyner.</p>
Floating-point arithmetic, IEEE 754 Standard, floating-point multiplication, IEEE rounding.
P. Seidel and G. Even, "A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication," in IEEE Transactions on Computers, vol. 49, no. , pp. 638-650, 2000.