Issue No. 07 - July (1999 vol. 48)

ISSN: 0018-9340

pp: 690-706

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.780877

ABSTRACT

<p><b>Abstract</b>—An efficient implementation of a parallel version of the Feng-Rao algorithm on a one-dimensional systolic array is presented in this paper by adopting an extended syndrome matrix. Syndromes of the same order, lying on a slant diagonal in the extended syndrome matrix, are scheduled to be examined by a series of cells simultaneously and, therefore, a high degree of concurrency of the Feng-Rao algorithm can be achieved. The time complexity of the proposed architecture is <tmath>$m+g+1$</tmath> by using a series of <tmath>$t+\lfloor {\frac{g-1}{2}} \rfloor +1$</tmath>, nonhomogeneous but regular, effective processors, called PE cells, and <tmath>$g$</tmath> trivial processors, called D cells, where <tmath>$t$</tmath> is designed as the half of the Feng-Rao bound. Each D cell contains only delay units, while each PE cell contains one finite-field inverter and, except the first one, one or more finite-field multipliers. Cell functions of each PE cell are basically the same and the overall control circuit of the proposed array is quite simple. The proposed architecture requires, in total, <tmath>$t+\lfloor {\frac{g-1}{2}} \rfloor +1$</tmath> finite-field inverters and <tmath>${\frac{(t+\lfloor (g-1)/2 \rfloor)(t+\lfloor (g-1)/2 \rfloor +1)}{2}}$</tmath> finite-field multipliers. For a practical design, this hardware complexity is acceptable.</p>

INDEX TERMS

Error-correcting codes, algebraic-geometric codes, Feng-Rao algorithm, systolic array.

CITATION

Chih-Wei Liu, Kuo-Tai Huang, Chung-Chin Lu, "A Systolic Array Implementation of the Feng-Rao Algorithm",

*IEEE Transactions on Computers*, vol. 48, no. , pp. 690-706, July 1999, doi:10.1109/12.780877