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Issue No.10 - October (1997 vol.46)
pp: 1146-1150
ABSTRACT
<p><b>Abstract</b>—A residue to binary converter architecture based on the Chinese Remainder Theorem (CRT) is presented. This is achieved by introducing a general moduli set <it>S</it><super><it>k</it></super></p><tf>$$S^k=\left\{ {2^m-1,\,\,2^{2^0m}+1,\,\,2^{2^1m}+1,\,\,2^{2^2m}+1,\,\,\ldots ,\, \,2^{2^km}+1} \right\}$$</tf><ip1>for Residue Number System (RNS) applications. Residue to binary converter architectures based on moduli sets <it>S</it><super>0</super> = {2<super><it>m</it></super>− 1, 2<super><it>m</it></super> + 1} and <it>S</it><super>1</super> = {2<super><it>m</it></super>− 1, 2<super><it>m</it></super> + 1, 2<super><it>2m</it></super> + 1} are developed. The conversion procedure is performed in the following three levels:</ip1><p></p><ip1>•   residue to signed-digit,</ip1><ip1>•   signed-digit to binary,</ip1><ip1>•   end-around carry addition/subtraction.</ip1><p></p><ip1>In the first level of operation, the signed-digit representation of the CRT equation is realized by using redundant adder/subtractor blocks. Here, the necessary embedded multiplications are replaced by simple shift-left operations and the carry propagation is totally eliminated. In the second level, the redundant representation of CRT is directly converted to binary format. Finally, an end-around carry (EAC) addition/subtraction is performed to obtain the result at the third level of operation. The proposed architectures are simple, fast, free of memory blocks and modulo adders.</ip1>
INDEX TERMS
VLSI arithmetic algorithms, residue number systems, residue to binary conversion, signed-digit number systems, Chinese remainder theorem, digital signal processing.
CITATION
F. Pourbigharaz, H.m. Yassine, "Signed-Digit Architecture for Residue to Binary Transformation", IEEE Transactions on Computers, vol.46, no. 10, pp. 1146-1150, October 1997, doi:10.1109/12.628400