Issue No.08 - August (1995 vol.44)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.403715
<p><it>Abstract</it>—Matrix computations are often expressed in terms of plane rotations, which may be implemented using COordinate Rotation DIgital Computer (CORDIC) arithmetic. As matrix sizes increase multiprocessor systems employing traditional CORDIC arithmetic, which operates on two-dimensional (2D) vectors, become unable to achieve sufficient speed. Speed may be increased by expressing the matrix computations in terms of higher dimensional rotations and implementing these rotations using novel CORDIC algorithms—called Householder CORDIC—that extend CORDIC arithmetic to arbitrary dimensions. The method employed to prove the convergence of these multi-dimensional algorithms differs from the one used in the 2D case. After a discussion of scaling factor decomposition, range extension and numerical errors, VLSI implementations of Householder CORDIC processors are presented and their speed and area are estimated. Finally, some applications of the Householder CORDIC algorithms are listed.</p>
CORDIC, computer arithmetic, Householder reflections, parallel algorithms, VLSI.
Jean-Marc Delosme, Shen-Fu Hsiao, "Householder CORDIC Algorithms", IEEE Transactions on Computers, vol.44, no. 8, pp. 990-1001, August 1995, doi:10.1109/12.403715