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ABSTRACT
<p><it>Abstract</it>—As microprocessor speeds continue to improve at a very fast rate the bandwidth requirements for system level interconnections in multiprocessors may eventually rule out the use of shared buses even for small scale multiprocessors. On the other hand high-speed unidirectional links are an emerging technology that has the potential to scale with microprocessor technology and could replace buses as the interconnection fabric for future multiprocessors. In this paper we evaluate the performance of the unidirectional slotted ring interconnection for small to medium scale shared memory systems, using a hybrid methodology of analytical models and trace-driven simulations. We use memory traces from actual execution of parallel programs to drive detailed event-driven simulations of a variety of ring and bus multiprocessors. Snooping and directory coherence protocols for the slotted ring are evaluated in the context of multitasking. Snooping is shown to outperform full-map and linked list directory schemes in the unidirectional slotted ring, and it also compares favorably to high-performance split-transaction bus systems.</p>
INDEX TERMS
Cache coherence protocols, computer architecture, shared memory multiprocessors, slotted ring, trace-driven simulation, analytical models.
CITATION

M. Dubois and L. A. Barroso, "Performance Evaluation of the Slotted Ring Multiprocessor," in IEEE Transactions on Computers, vol. 44, no. , pp. 878-890, 1995.
doi:10.1109/12.392846
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