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<p>Reliable floating-point arithmetic is vital for dependable computing systems. It is also important for future high-density VLSI realizations that are vulnerable to soft-errors. However, the direct checking of floating-point arithmetic is still an open problem. The author presents a set of reliable floating-point arithmetic algorithms for low-cost residue encoded and Berger encoded operands, respectively. Closed form equations are derived for floating-point addition, subtraction, multiplication, and division. Given the standard IEEE floating-point numbers, the proposed reliable floating-point multiplication algorithms for low-cost residue encoded operands are extremely low-cost: it requires less than 8% of hardware redundancy in all cases. For reliable floating-point addition and subtraction, the author finds the hardware redundancy ratios of applying low-cost residue code is about the same as that of applying Berger code: less than 40% of hardware redundancy for single precision numbers and about 16% for double precision numbers. For reliable floating-point division, Berger encoded operands yields hardware cost-effectiveness: about 45% for single precision numbers and about 36% for double precision numbers.</p>
redundancy; digital arithmetic; error correction codes; floating-point arithmetic; error-coded operands; high-density VLSI; soft-errors; residue encoded; Berger encoded; reliable floating-point multiplication; redundancy ratios; hardware redundancy; Berger check prediction; computer arithmetic; concurrent error detection; standard IEEE floating-point numbers, ; low-cost residue codes.
Jien-Chung Lo, "Reliable Floating-Point Arithmetic Algorithms for Error-Coded Operands", IEEE Transactions on Computers, vol. 43, no. , pp. 400-412, April 1994, doi:10.1109/12.278479
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