Issue No. 11 - November (1993 vol. 42)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.247841
<p>This paper describes a new type of carry-skip adder, which can be faster than the conventional two-level carry-skip adders. A way to design optimum adders of this new type is described. In optimum adders of this type, the sizes of the sections of bit positions are bimodal, but the sizes of the blocks in each section are unimodal, unlike the bimodal block sizes in Guyot et al.'s traditional two-level carry-skip adders. A 60-b 2- mu m CMOS adder of this type is designed. This adder's simulated delay is approximately 12.6 ns.</p>
accelerated two-level carry-skip adders; bit positions; bimodal; unimodal; CMOS VLSI; 12.6 sec; 2 micron; adders; CMOS integrated circuits; delays; VLSI.
V. Kantabutra, "Accelerated Two-Level Carry-Skip Adders-A Type of Very Fast Adders", IEEE Transactions on Computers, vol. 42, no. , pp. 1389-1393, November 1993, doi:10.1109/12.247841