Issue No. 05 - May (1993 vol. 42)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.223682
<p>A limiting factor in high-performance vector computers is the rate at which data can be moved to and from memory during vector loads and stores. To increase the bandwidth of vector memory operations, several investigators have proposed the use of noninterleaved storage mappings, also known as storage schemes. A method of analyzing the performance of vector references for the class of storage schemes referred to as XOR schemes is described. The proposed measure of relative performance, the variability of an access, is defined and its computation is outlined. The use of variability as a performance indicator is demonstrated and compared with performance measurements made using simulation. One of the key aspects of the variability measure is its capability to lend insight to the transient behavior of vector accesses.</p>
vector access performance; parallel memory architectures; high-performance vector computers; vector memory operations; noninterleaved storage mappings; vector references; XOR schemes; performance measurements; variability measure; memory architecture; parallel architectures; performance evaluation.
D.T. Harper, III, Y. Costa, "Analytical Estimation of Vector Access Performance in Parallel Memory Architectures", IEEE Transactions on Computers, vol. 42, no. , pp. 616-624, May 1993, doi:10.1109/12.223682