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<p>Two exponentiation circuits are proposed. Using the fact that squaring is a linear operation over GF(2/sup n/), a time-space tradeoff in smartcard-based circuitry is presented. It is shown how multiplication is performed by a single shift, based on replacing the public key alpha /sup a/ in GF(2/sup n/) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated.</p>
exponentiation circuits; linear operation; time-space tradeoff; smartcard-based circuitry; public key; structure regularity; dynamic shift registers; cryptography; digital arithmetic; smart cards.
B. Arazi, "Architectures for Exponentiation Over GD(2/sup n/) Adopted for Smartcard Application", IEEE Transactions on Computers, vol. 42, no. , pp. 494-497, April 1993, doi:10.1109/12.214694
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