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Issue No. 12 - December (1992 vol. 41)
ISSN: 0018-9340
pp: 1612-1615
<p>A fully static complementary metal-oxide semiconductor (CMOS) implementation of a Ling-type 32-bit adder is described. The implementation saves up to one gate delay and always reduces the number of serial transistors in the worst-case critical path over the conventional carry look-ahead (CLA) approach with a negligible increaser in hardware.</p>
high speed addition; CMOS; static complementary metal-oxide semiconductor; Ling-type 32-bit adder; gate delay; serial transistors; worst-case critical path; carry look-ahead; 32 bit; adders; CMOS integrated circuits.

M. Flynn and N. Quach, "High-Speed Addition in CMOS," in IEEE Transactions on Computers, vol. 41, no. , pp. 1612-1615, 1992.
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