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Issue No. 08 - August (1992 vol. 41)
ISSN: 0018-9340
pp: 931-939
<p>The design of the 56-b significant adder used in the Advanced Micro Devices Am29050 microprocessor is described. Originally implemented in a 1- mu m design role CMOS process, it evaluates 56-b sums in well under 4 ns. The adder employs a novel method for combining carries which does not require the back propagation associated with carry lookahead, and is not limited to radix-2 trees, as is the binary lookahead carry tree of R.P. Brent and H.T. Kung (1982). The adder also utilizes a hybrid carry lookahead-carry select structure which reduces the number of carriers that need to be derived in the carry lookahead tree. This approach produces a circuit well suited for CMOS implementation because of its balanced load distribution and regular layout.</p>
spanning tree carry lookahead adder; significant adder; Advanced Micro Devices; Am29050 microprocessor; hybrid carry lookahead-carry select; carry lookahead tree; CMOS; load distribution; layout; 56 bit; adders; carry logic; CMOS integrated circuits; integrated logic circuits; trees (mathematics).

E. Swartzlander, Jr. and T. Lynch, "A Spanning Tree Carry Lookahead Adder," in IEEE Transactions on Computers, vol. 41, no. , pp. 931-939, 1992.
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