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<p>A different approach to hardware evaluation of elementary functions for high-precision floating-point numbers (in particular, the extended double precision format of the IEEE standard P754) is examined. The evaluation is based on rational approximations of the elementary functions, a method which is commonly used in scientific software packages. A hardware model is presented of a floating-point numeric coprocessor consisting of a fast adder and a fast multiplier, and the minimum hardware required for evaluation of the elementary functions is added to it. Next, rational approximations for evaluating the elementary functions and testing the accuracy of the results are derived. The calculation time of these approximations in the proposed numeric processor is then estimated. It is concluded that rational approximations can successfully complete with previously used methods when execution time and silicon area are considered.</p>
elementary functions; rational approximations; high-precision floating-point numbers; extended double precision format; IEEE standard P754; floating-point numeric coprocessor; fast adder; fast multiplier; execution time; silicon area; approximation theory; digital arithmetic; function evaluation; microprocessor chips.

O. Zinaty and I. Koren, "Evaluating Elementary Functions in a Numerical Coprocessor Based on Rational Approximations," in IEEE Transactions on Computers, vol. 39, no. , pp. 1030-1037, 1990.
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