The Full-Use-of-Suitable-Spares (FUSS) Approach to Hardware Reconfiguration for Fault-Tolerant Processor Arrays
Issue No. 04 - April (1990 vol. 39)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.54851
<p>A general approach to hardware recognition is proposed for VLSI/WSI fault-tolerant processor arrays. The technique, called full use of suitable spares (FUSS), uses an indicator vector, the surplus vector, to guide the replacement of faulty processors within an array. Analytical study of the general FUSS algorithm shows that there is a linear relationship between the array size and the area of interconnect required for reconfiguration to be 100% successful. In an instance of FUSS, called simple FUSS, reconfiguration is done by shifting up to or down the surplus vector's entries. The surplus vector is progressively updated after each column is reconfigured. The reconfiguration is successful when the surplus vector becomes null. Simple FUSS is discussed in detail and evaluated. Simulations show that when the number of faulty processors is equal to that of space processors, simple FUSS can achieve a probability of survival as high as 99%.</p>
full-use-of-suitable repairs approach; hardware reconfiguration; fault-tolerant processor arrays; VLSI; WSI; indicator vector; surplus vector; interconnect; electronic engineering computing; fault tolerant computing; VLSI.
J. Fortes and M. Chean, "The Full-Use-of-Suitable-Spares (FUSS) Approach to Hardware Reconfiguration for Fault-Tolerant Processor Arrays," in IEEE Transactions on Computers, vol. 39, no. , pp. 564-571, 1990.