Issue No.04 - April (1990 vol.39)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.54840
<p>An approach to the design of reconfigurable programmable logic arrays (RPLAs) is proposed in which diagnosis of faults and reconfiguration are performed simultaneously. The approach also takes advantage of a laser programmable interconnect to simplify the test circuitry and area overhead. The RPLA design presented makes it possible to diagnose and repair faults on bit lines, product lines, and output lines. The unrepairable area in the RPLA is kept to a minimum. Only one extra input is required for testability. A mapping process for masking out missing crosspoint faults is employed to further enhance the yield of PLAs. Experimental results on the area overhead and the yield of the proposed RPLAs are presented. The field of the proposed RPLAs is higher than that of the original PLAs.</p>
design; reconfigurable programmable logic arrays; laser programmable interconnect; test circuitry; area overhead; product lines; output lines; testability; mapping process; logic arrays; logic design.
D.S. Ha, V.P. Kumar, "On the Design of High-Yield Reconfigurable PLA's", IEEE Transactions on Computers, vol.39, no. 4, pp. 470-479, April 1990, doi:10.1109/12.54840