Issue No.09 - September (1989 vol.38)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.29468
The problem of recovering multipipelines in the presence of faulty stages is addressed. The stages are assumed to be organized in rows and columns. The pipeline stages are alternated with reconfiguring circuitry which is used for bypassing the faulty stages. The pipelines are configured by programming the switches in a distributed manner using fault information available locally. The configurat
reconfigurable multipipelines; probabilistic bounds; vector supercomputers; rows; columns; reconfiguring circuitry; delay; yield; fault-tolerant buses; fault tolerant computing; parallel processing; pipeline processing.
R. Gupta, A. Zorat, I.V. Ramakrishnan, "Reconfigurable Multipipelines for Vector Supercomputers", IEEE Transactions on Computers, vol.38, no. 9, pp. 1297-1307, September 1989, doi:10.1109/12.29468