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ABSTRACT
The use of a fault-tolerant VLSI system for storing and solving linear programming problems is presented. The system can bear multiple faults in processing elements and/or links and still function with an acceptable performance degradation. It is based on an interconnection pattern consisting of a complete binary tree in which spare links between cousin nodes are added so as to reconfigure it a
INDEX TERMS
gracefully degradable; fault-tolerant VLSI system; linear programming problems; multiple faults; interconnection pattern; complete binary tree; cousin nodes; ternary tree; faulty processing elements; simplex algorithm; computational complexity; fault tolerant computing; linear programming; VLSI.
CITATION
A.A. Bertossi, M.A. Bonuccelli, "A Gracefully Degradable VLSI System for Linear Programming", IEEE Transactions on Computers, vol. 38, no. , pp. 853-861, June 1989, doi:10.1109/12.24294
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