Issue No. 12 - December (1988 vol. 37)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.9735
The mapping of algorithms structured as depth-p nested FOR loops into special-purpose systolic VLSI linear arrays is addressed. The mappings are done by using linear functions to transform the original sequential algorithms into a form suitable for parallel execution on linear arrays. A feasible mapping is derived by identifying formal criteria to be satisfied by both the original sequential al
linear array algorithms; nested FOR loop algorithms; systolic VLSI linear arrays; mappings; parallel execution; parallel algorithms.
L. Peizong and Z. Kedem, "Synthesizing Linear Array Algorithms from Nested FOR Loop Algorithms," in IEEE Transactions on Computers, vol. 37, no. , pp. 1578-1598, 1988.