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ABSTRACT
A data compression technique called self-testable and error-propagating space compression is proposed and analyzed. Faults in a realization of Exclusive-OR and Exclusive-NOR gates are analyzed, and the use of these gates in the design of self-testing and error propagating space compressors is discussed. It is argued that the proposed data-compression technique reduce the hardware complexity in
INDEX TERMS
fault analysis; data compression technique; built-in self-test; error-propagating space compression; Exclusive-OR; Exclusive-NOR; self-testing; BIST; automatic testing; data compression; logic testing.
CITATION
M.G. Karpovsky, K.K. Saluja, S.M. Reddy, "A Data Compression Technique for Built-In Self-Test", IEEE Transactions on Computers, vol. 37, no. , pp. 1151-1156, September 1988, doi:10.1109/12.2271
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