Issue No. 09 - September (1988 vol. 37)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.2263
The relevant definitions are given and a model of self-checking iterative network is presented. A general combinational circuit was developed that is totally self-checking and can detect an error on the input code lines and transmit the error to the output code lines. Thus, an error generated in a cell is transmitted from cell to cell until the last cell is reached. The error, and fault that ge
self-checking; iterative network; combinational circuit; error; redundancy; combinatorial circuits; error detection; iterated switching networks.
S. Dhawan, R.C. De Vries, "Design of Self-Checking Iterative Networks", IEEE Transactions on Computers, vol. 37, no. , pp. 1121-1125, September 1988, doi:10.1109/12.2263