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Q-modules are internally clocked modules that can be used to satisfy delay-insensitive specifications. A single delay element is required with a one-sided bound that its value be greater than the maximum delay of the combination logic. Prototypes of components to implement Q-modules have been designed, and a design aid program, QSYN, to place instances of these components, personalize a PLA, an
testability; Q-modules; internally clocked; delay-insensitive; QSYN; CMOS realization; testing; asynchronous sequential logic; CMOS integrated circuits; integrated logic circuits; logic design; logic testing; sequential circuits.
T.-P. Fang, F.U. Rosenberger, T.J. Chaney, C.E. Molnar, "Q-Modules: Internally Clocked Delay-Insensitive Modules", IEEE Transactions on Computers, vol. 37, no. , pp. 1005-1018, September 1988, doi:10.1109/12.2252
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