Issue No. 08 - August (1988 vol. 37)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.2248
In recent years, many architectural design efforts have focused on maximizing performance for frequently executed, simple instructions. The authors describe how a small set of primitive instructions combined with what is considered careful frequency analysis and clever programming allows the Hewlett-Packard (HP) Precision Architecture integer multiplication and division implementation to provid
integer division; HP Precision Architecture; frequency analysis; programming; Hewlett-Packard; integer multiplication; performance; computer architecture; digital arithmetic; Hewlett Packard computers.
L. Peters, D. Magenheimer, D. Zuras and K. Pettis, "Integer Multiplication and Division on the HP Precision Architecture," in IEEE Transactions on Computers, vol. 37, no. , pp. 980-990, 1988.