Issue No. 04 - April (1988 vol. 37)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.2193
A method is presented to design pseudoexhaustive testable (PET) PLAs (programmable logic arrays) that are suitable for BIST (built-in self-test) environments. The key idea of the design is to partition inputs and product lines into groups. During testing, a group of inputs and a group of product lines are selected and tested exhaustively. The proposed design leads to small test sizes and relati
pseudoexhaustive testable PLA; design; programmable logic arrays; built-in self-test; cellular arrays; logic design; logic testing.
D. S. Ha and S. Reddy, "On the Design of Pseudoexhaustive Testable PLAs," in IEEE Transactions on Computers, vol. 37, no. , pp. 468-472, 1988.