Issue No. 04 - April (1988 vol. 37)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.2183
A description is given of the multicomputer architecture for fault tolerance (MAFT), a distributed system designed to provide extremely reliable computation in real-time control systems. MAFT is based on the physical and functional partitioning of executive functions from applications functions. The implementation of the executive functions in a special-purpose hardware processor allows the fau
MAFT architecture; distributed fault tolerance; multicomputer architecture for fault tolerance; real-time control systems; functional partitioning; special-purpose hardware processor; application programs; Byzantine agreement; approximate agreement algorithms; computer architecture; distributed processing; fault tolerant computing.
A.M. Finn, C.J. Walter, P.M. Thambidurai, R.M. Keichafer, "The MAFT Architecture for Distributed Fault Tolerance", IEEE Transactions on Computers, vol. 37, no. , pp. 398-405, April 1988, doi:10.1109/12.2183