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A design method of totally self-checking (TSC) m-out-of-2m code checkers is presented. The design is composed basically of two full-adder/half-adder trees, each summing up the ones received on m input lines, and a k-variable two-pair two-rail code tree that compares the outputs of the two-adder tree. The only modules used are full-adders, half-adders, and two-variable TSC two-rail code checkers
totally self-checking checkers; modular design; codes; full-adder; half-adder; trees; VLSI MOS implementation; adders; codes; logic design.
D. Nikolos, C. Halatsis, A.M. Paschalis, "Efficient Modular Design of TSC Checkers for M-out-of-2M-Codes", IEEE Transactions on Computers, vol. 37, no. , pp. 301-309, March 1988, doi:10.1109/12.2167
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