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The switch-level abstraction of digital MOS circuits has been used primarily in simulators. In formal verification, a functional description must be first extracted from the switch network. It is shown here how the theory of characteristic functions can be applied to analyze such networks and to extract their functional description.
connector-switch-attenuator networks; switch-level abstraction; digital MOS circuits; formal verification; functional description; characteristic functions; electron device testing; failure analysis; field effect integrated circuits; logic testing; switching networks.

E. Cerny and J. Gecesi, "Functional Description of Connector-Switch-Attenuator Networks," in IEEE Transactions on Computers, vol. 37, no. , pp. 111-114, 1988.
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