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Issue No. 10 - October (vol. 35)
ISSN: 0018-9340

Author's Reply (PDF)

J.E. Smith , Astronautics Corporation of America
pp. 931

IEEE Computer Society (PDF)

pp. c2

Built-In Testing of Memory Using an On-Chip Compact Testing Scheme (PDF)

K. Kinoshita , Department of Information ahd Behavioral Sciences, Faculty of Integrated Arts and Sciences, Hiroshima University
pp. 862-870

Clocking Schemes for High-Speed Digital Systems (Abstract)

S.H. Unger , Department of Computer Science, Columbia University
pp. 880-895

Comments on "A Massive Memory Machine" (PDF)

J.R. Goodman , Department of computer Science, University of Wisconsin
pp. 907-910

Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor (Abstract)

null Woei Lin , Department of Electrical Engineering, Pennsylvania State University
pp. 910-916

Dual Systolic Architectures for VLSI Digital Signal Processing Systems (Abstract)

G.E. Bridges , Department of Electrical Engineering, University of Manitoba
pp. 916-923

A VLSI Solution to the Vertical Segment Visibility Problem (Abstract)

E. Lodi , Department of Information Science, University of Pisa
pp. 923-928

Comments on "Matrix Processors Using p-Adic Arithmetic for Exact Linear Computations" (PDF)

R.N. Gorgui-Naguib , Department of Electrical Engineering, Imperial College of Science and Technology
pp. 928-930

Comments on "Detection of Faults in Programmable Logic Arrays" (PDF)

null Liang Ye-Wei , Beijing Institute of Computer Technology
pp. 930-931

Author's Reply (PDF)

J.E. Smith , Astronautics Corporation of America
pp. 931

Author's Reply<sup>1</sup> (PDF)

A.A. Nilsson , Center for Communications and Signal Processing, North Carolina State University
pp. 932

Correction to "Lower Bounds for Sorting with Realistic Instruction Sets" (PDF)

E. Dittert , Department of Computer Science, New Mexico State University
pp. 932

Information for Authors (PDF)

pp. 932
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