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Issue No. 05 - May (1986 vol. 35)
ISSN: 0018-9340
pp: 476-478
J.P. Roth , IBM Thomas J. Watson Research Center
Programmed logic arrays [1], [2] are common in computer design. A form of this method of design has been used since the beginnings of computers, in telephone relay networks [3]. Optimization of such realizations of functions were begun by Karnaugh [4], Quine [5], McCluskey [6], and Roth [7]. Substantial use was mnade of such programs by Preiss [8] and Perlman [9]. Despite the existence of exact procedures, "fast," "approximate" procedures have been widely used. A new approximate procedure, using the D algorithm [1], [10], [11] is introduced here. It gets around a large computation, in complementation, using prior methods. Running programs "verify" this expectation.
PLA, D algorithm, logic, minimization
J.P. Roth, "Minimization by the D Algorithm", IEEE Transactions on Computers, vol. 35, no. , pp. 476-478, May 1986, doi:10.1109/TC.1986.1676790
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