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TABLE OF CONTENTS
Issue No. 08 - August (vol. 34)
ISSN: 0018-9340
Papers

IEEE Computer Society (PDF)

pp. c2

Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array (Abstract)

null Hao-Yung Lo , Department of Electrical Engineering, National Tsing Hua University
pp. 681-691

VLSI Architectures for Computing Multiplications and Inverses in GF(2<sup>m</sup>) (Abstract)

C.C. Wang , Communications Systems Research, Jet Propulsion Laboratory, California Institute of Technology
pp. 709-717

Square-Rooting Algorithms for High-Speed Digital Circuits (Abstract)

S. Majerski , Instytut Maszyn Matematycznych
pp. 724-733

Synchronizing Large VLSI Processor Arrays (PDF)

A.L. Fisher , Department of Computer Science, Carnegie-Mellon University
pp. 734-740

A Fast Serial-Parallel Binary Multiplier (PDF)

R. Gnanasekaran , Department of Electrical Engineering and Computer Science, University of Nevada
pp. 741-744

General Model for Memory Interference in Multiprocessors and Mean Value Analysis (Abstract)

B. Smilauer , Research Institute for Mathematical Machines
pp. 744-751

Ensuring Fault Tolerance of Phase-Locked Clocks (Abstract)

C.M. Krishna , Department of Electrical and Computer Enginieering, University of Massachusetts
pp. 752-756

Note on a Proposed Test for Random Number Generators (Abstract)

G. Marsaglia , Department of Computer Science, Washington State University
pp. 756-758

A Totally Self-Checking Error Indicator (Abstract)

N. Gaitanis , Department of Computers, NRC Democritos
pp. 758-761

Verification of Register Transfer Level Parallel Control Sequences (Abstract)

V. Pitchumani , Department of Electrical and Computer Engineering, Syracuse University
pp. 761-765

Reconfiguration Algorithms for Interconnection Networks (Abstract)

A.Y. Oruc , Department of Electrical, Computer and Systems Engineering, Rensselaer Polytechnic Institute
pp. 773-776

Information for Authors (PDF)

pp. 776
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