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Issue No. 02 - February (1985 vol. 34)
ISSN: 0018-9340
pp: 163-169
V.C. Jaswa , System Industries
ABSTRACT
We describe a computer architecture for implementing real-time controllers. The concurrent processor architecture for control (CPAC) is optimized for computing the state transitions of a controller. While general-purpose computers are optimized for data manipulation, CPAC is optimized for state manipulation since the states of a controller and the rules governing state transitions constitute a complete high-level description of a controller implementation. The CPAC architecture characterizes a controller in terms of the sets of continuous and discrete states of the system and-logically as well as physically separates the two sets. This dichotomy results in a simpler specification of the rules for state transitions.
INDEX TERMS
VLSI, Computer architecture, concurrent processing, controls, programmable control, real-time, real-time control
CITATION
J.T. Pedicone, C.E. Thomas, V.C. Jaswa, "CPAC?Concurrent Processor Architecture for Control", IEEE Transactions on Computers, vol. 34, no. , pp. 163-169, February 1985, doi:10.1109/TC.1985.1676553
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