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Issue No. 06 - June (1984 vol. 33)
ISSN: 0018-9340
pp: 578-583
E. Fujiwara , Musashino Electrical Communication Laboratory, N.T.T.
This correspondence demonstrates a new kind of error-checking scheme for multioutput combinational circuits and its use for a built-in testing method. In the error-checking logic employed, the output from the circuits being checked is partitioned into several groups. The predicted group parity is compared to that produced from the output in each group. This checking circuit, called a group-parity prediction (GPP) checker, can be implemented systematically. To ensure that the GPP checker is self-testing, several conditions are required. The self-testing GPP checkers are implemented for some concrete examples of multioutput combinational circuits. With respect to these examples, the self-testing GPP checker shows 87-100 percent error detection ability, and 91-100 percent fault coverage for single stuck faults. Using this self-testing GPP checker, a self-verification testing method, which takes advantage of the automatic fault-detection capability of a checker, is shown to be applicable to testing combinational circuits.
self-verification, Built-in testing, duplication, error-detection ability, fault-detection ability, group-parity prediction checker, self-checking checker, self-testing
N. Mutoh, E. Fujiwara, K. Matsuoka, "A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing", IEEE Transactions on Computers, vol. 33, no. , pp. 578-583, June 1984, doi:10.1109/TC.1984.1676486
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