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Issue No. 04 - April (1984 vol. 33)
ISSN: 0018-9340
pp: 373-374
T. Rhyne , Department of Electrical Engineering, Texas A&M University
ABSTRACT
The fan-in and fan-out limitations imposed by specific gate circuits force corresponding limits-upon the sizes of carry lookahead circuits fabricated from those gates. The relationships between those limits are derived, providing simple formulae that can be used by designers seeking to fabricate fast combinational binary adders.
INDEX TERMS
high-speed arithmetic, Binary addition, carry lookahead
CITATION
T. Rhyne, "Limitations on Carry Lookahead Networks", IEEE Transactions on Computers, vol. 33, no. , pp. 373-374, April 1984, doi:10.1109/TC.1984.1676445
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