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TABLE OF CONTENTS
Issue No. 02 - February (vol. 33)
ISSN: 0018-9340
Papers

IEEE Computer Society (PDF)

pp. c2

Design and Evaluation of a Fault-Tolerant Multiprocessor Using Hardware Recovery Blocks (Abstract)

null Yann-Hang Lee , Department of Electrical and Computer Engineering, University of Michigan
pp. 113-124

Dynamic Characteristics of Loops (Abstract)

M. Kobayashi , Amdahl Corporation
pp. 125-132

Finding Maximum on an Array Processor with a Global Bus (Abstract)

S.H. Bokhari , Department of Electrical Engineering, University of Engineering and Technology
pp. 133-139

A VLSI-Based I/O Formatting Device (Abstract)

S.W. White , Advanced System Design Group, IBM
pp. 140-149

Performance Evaluation of the Computer Network Dynamic Congestion Table Algorthm (PDF)

C.A. Niznik , Center for Brain Research, University of Rochester School of Medicine
pp. 150-159

A Switch-Level Model and Simulator for MOS Digital Systems (PDF)

R.E. Bryant , Department of Computer Science, 256-80, California Institute of Technology
pp. 160-177

Architecture for VLSI Design of Reed-Solomon Decoders (PDF)

null Kuang Yung Liu , Jet Propulsion Laboratory, California Institute of Technology
pp. 178-189

Families of Fixed Degree Graphs for Processor Interconnection (Abstract)

M.R. Jerrum , Department of Computer Science, University of Edinburgh
pp. 190-194

Sequential Fault Diagnosis of Modular Systems (Abstract)

P.K. Varshney , Department of Electrical and Computer Engineering, Syracuse University
pp. 194-197

Reliability Evaluation of Fault-Tolerant Systems?Effect of Variability in Failure Rates (PDF)

R.K. Iyer , Science Laboratory, Department of Electrical Engineering, University of Illinois
pp. 197-200

Information for Authors (PDF)

pp. 200
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