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Dynamic time warping is a well-established technique for time alignment and comparison of speech and image patterns. This paper decribes the architecture, algorithms, and design of a CMOS integrated processing array used for computing the dynamic time warp algorithm. Emphasis is placed on speech recognition applications because of the real-time constraints imposed by isolated and continuous speech recognition.
VLSI design, Array processor, dynamic programming, multiprocessing architectures, parallel processing, pattern matching, pipelining, speech recognition

D. Burr, N. Weste and B. Ackland, "Dynamic Time Warp Pattern Matching Using an Integrated Multiprocessing Array," in IEEE Transactions on Computers, vol. 32, no. , pp. 731-744, 1983.
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