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Issue No. 07 - July (vol. 32)
ISSN: 0018-9340

IEEE Computer Society (PDF)

pp. c2

Editor's Notice (PDF)

pp. 601-602

An Abstract Model of Behavior for Hardware Descriptions (Abstract)

M.C. McFarland , Department of Computer Science, Boston College
pp. 621-637

Graph Theoretical Analysis and Design of Multistage Interconnection Networks (PDF)

D.P. Agrawal , Department of Electrical and Computer Engineering, North Carolina State University
pp. 637-648

Expected Capacity of (m2)-Networks (Abstract)

G.M. Masson , Department of Electrical Engineering and Computer Science, Johns Hopkins University
pp. 649-657

Torus and Other Networks as Communication Networks With Up to Some Hundred Points (Abstract)

C. Von Conta , Institut fur Informatik, Technische Universitat Munchen
pp. 657-666

Binary Search in a Multiprocessing Environment (Abstract)

J.-L. Baer , Department of Computer Science, University of Washington
pp. 667-677

The Analysis and Design of Some New Sorting Machines (Abstract)

L.E. Winslow , Department of Computer Science, University of Dayton
pp. 677-683

Area?Time Optimal VLSI Circuits for Convolution (Abstract)

G.M. Baudet , Department of Computer Science, Brown University
pp. 684-688

Performance of Cross-Bar Multiprocessor Systems (Abstract)

K.O. Siomalas , Department of Systems and Computer Engineering, Carleton University
pp. 689-695

A Self-Test Hardwired Control Section (Abstract)

A. Miczo , Large Information Systems Division, Honeywell Information Systems
pp. 695-696

Information for Authors (PDF)

pp. 696
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