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Issue No. 11 - November (vol. 30)
ISSN: 0018-9340

IEEE Computer Society (PDF)

pp. c2

Introduction (PDF)

pp. 821-822

A Design of Programmable Logic Arrays with Universal Tests (Abstract)

H. Fujiwara , Department of Electronic Engineering, Osaka University
pp. 823-828

A Hardware Approach to Self-Testing of Large Programmable Logic Arrays (PDF)

W. Daehin , Lehrstuhl f?r Theoretische Elektrotechnik, University of Hannover
pp. 829-833

A Testable Design of Iterative Logic Arrays (Abstract)

R. Parthasarathy , Department of Electrical and Computer Engineering, University of Iowa
pp. 833-841

Design of Easily Testable Bit-Sliced Systems (PDF)

T. Sridhar , Texas Instruments, Inc.
pp. 842-854

Multiple Fault Testing of Large Circuits by Single Fault Test Sets (Abstract)

V.K. Agarwal , Department of Electrical Engineering, McGill University
pp. 855-865

Design for Autonomous Test (PDF)

E.J. McCluskey , Center for Reliable Computing, Computer Systems Laboratory, Departments of Computer Science and Electrical Engineering, Stanford University
pp. 866-875

Design of Testable Structures Defined by Simple Loops (Abstract)

J.A. Abraham , Coordinated Science Laboratory, University of Illinois
pp. 875-884

New Measures of Testability and Test Complexity for Linear Analog Failure Analysis (Abstract)

R.W. Priester , Systems and Measurements Division, Research Triangle Institute
pp. 884-888

Diagnosability of Nonlinear Circuits and Systems?Part I: The dc Case (Abstract)

V. Visvanathan , Department of Electrical Engineering and Computer Sciences, University of California
pp. 889-898

Diagnosability of Nonlinear Circuits and Systems?Part II: Dynamical Systems (Abstract)

R. Saeks , Department of Electrical Engineering, Texas Tech University
pp. 899-904
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