CSDL - IEEE Transactions on Computers - Table of Contents

TABLE OF CONTENTS

Issue No. 10 - October (vol. 30)

ISSN: 0018-9340

Papers

IEEE Transactions on Computers - Table of contents (PDF)

pp. c1

IEEE Computer Society (PDF)

pp. c2

A DAG-Based Algorithm for Prevention of Store-and-Forward Deadlock in Packet Networks (PDF)

D. Gelernter , Department of Computer Science, State University of New York

pp. 709-715

The Memory System of a High-Performance Personal Computer (Abstract)

D.W. Clark , Systems Architecture Group, Digital Equipment Corporation

B.W. Lampson

K.A. Pier

pp. 715-733

Congestion Control of Packet Communication Networks by Input Buffer Limits?A Simulation Study (Abstract)

S.S. Lam , Department of Computer Sciences, University of Texas

Y.C.L. Lien

pp. 733-742

Fault-Diagnosis for a Class of Multistage Interconnection Networks (Abstract)

null Tse-Yun Feng , Department of Computer and Information Science, The Ohio State University

null Chuan-Lin Wu

pp. 743-758

Error Complexity Analysis of Algorithms for Matrix Multiplication and Matrix Chain Product (Abstract)

null Nai-Kuan Tsao , Department of Computer Science, Wayne State University

pp. 758-771

Performance of Processor-Memory Interconnections for Multiprocessors (Abstract)

J.H. Patel , Coordinated Science Laboratory and the Department of Electrical Engineering, University of Illinois

pp. 771-780

On the Buffer Behavior with Poisson Arrivals, Priority Service, and Random Server Interruptions (Abstract)

J.G. Shanthikumar , Department of Industrial Engineering and Operations Research, Syracuse University

pp. 781-786

An Optimal Algorithm for Scheduling Requests on Interleaved Memories for a Pipelined Processor (Abstract)

C.V. Ramamoorthy , Department of Electrical Engineering and Computer Science and the Electronics Research Laboratory, University of California

B.W. Wah

pp. 787-800

A Hard Programmable Control Unit Design Using VLSI Technology (PDF)

B.I. Dervisoglu , Sperry Research Center

D.J. Criscione

pp. 800-810

An Improvement of Reliability of Memory System with Skewing Reconfiguration (Abstract)

T. Kanai , Department of Electrical and Computer Engineering, Lehigh University

pp. 811-812

Comments on "Concurrent Search and Insertion in AVL Trees" (PDF)

A. Gottlieb , Courant Institute of Mathematical Sciences, New York University

pp. 812

Correction to "Complete Solution of Boolean Equations" (PDF)

D. Almer , Tadiran

M.A. Tapia

J.H. Tucker

pp. 812

The Degradation in Memory Utilization Due to Dependencies (PDF)

C.V. Ramamoorthy , Department of Electrical Engineering and Computer Science, University of California

B.W. Wah

pp. 813-818

Correction to "The Mpg System: A Machine-Independent Efficient Microprogram Generator" (PDF)

pp. 818

Correction to "Dual-Mode Logic for Function-Independent Fault Testing" (PDF)

pp. 819

Correction to "An Efficient Method for Improving Reliability of a Pipeline FFT" (PDF)

pp. 819

Planned Special Issues IEEE Transactions on Computers (PDF)

pp. 819

IEEE Computer Society Publications (PDF)

pp. 819

Call for Papers Trends and Applications (PDF)

pp. 819