Issue No. 10 - October (1981 vol. 30)
D.W. Clark , Systems Architecture Group, Digital Equipment Corporation
The memory system of the Dorado, a compact high- performance personal computer, has very high I/O bandwidth, a large paged virtual memory, a cache, and heavily pipelined control; this paper discusses all of these in detail. Relatively low-speed I/O devices transfer single words to or from the cache; fast devices, such as a color video display, transfer directly to or from main storage while the processor uses the cache. Virtual addresses are used in the cache and for all I/O transfers. The memory is controlled by a seven-stage pipeline, which can deliver a peak main-storage bandwidth of 533 million bits/s to service fast I/O devices and cache misses. Interesting problems of synchronization and scheduling in this pipeline are discussed. The paper concludes with some performance measurements that show, among other things, that the cache hit rate is over 99 percent.
virtual memory, Cache, high bandwidth, memory system, pipeline, scheduling, synchronization
D.W. Clark, K.A. Pier, B.W. Lampson, "The Memory System of a High-Performance Personal Computer", IEEE Transactions on Computers, vol. 30, no. , pp. 715-733, October 1981, doi:10.1109/TC.1981.1675691