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Issue No. 09 - September (1979 vol. 28)
ISSN: 0018-9340
pp: 594-601
S.S. Patil , Department of Computer Science, University of Utah
This paper explores the use of a proposed programmable storage/logic array (SLA) chip as a general purpose universal logic element for digital computers. The SLA is compared to other programmable logic arrays in implementation and utilization, showing how it permits construction of complete digital subsystems on one chip without sacrifice in programmability. When compared with other contending very large-scale integrated technology (VLSI) approaches, such as microprogrammed processors and gate arrays, the SLA offers an attractive combination of cost, performance, and ease of implementation.
very large-scale integrated (VLSI) technology, Asynchronous circuits, digital integrated circuit design, digital systems design, logic arrays, programmable logic circuits

S. Patil and T. Welch, "A Programmable Logic Approach for VLSI," in IEEE Transactions on Computers, vol. 28, no. , pp. 594-601, 1979.
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