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Issue No. 07 - July (1979 vol. 28)
ISSN: 0018-9340
pp: 493-500
W.K.S. Walker , European Space Research and Technology Centre (ESTEC)
A program for the development of a highly reliable memory has been underway for a number ofyears at ESTEC. Plated wire and ferrite core spaceborne memories have been developed and qualified, and the more recent advent of low power LSI memory devices has made the semiconductor memory an attractive proposition for spaceborne applications. These technologies are briefly discussed and compared. However, in common with the previous solutions, the reliability of a semiconductor memory even when protected by a conventional single error correction scheme, did not meet the requirements of long duration space missions.
spaceborne memory, Erasure and error decoding, fault-tolerant memory
C.J. Black, C.-E.W. Sundberg, W.K.S. Walker, "A Reliable Spaceborne Memory with a Single Error and Erasure Correction Scheme", IEEE Transactions on Computers, vol. 28, no. , pp. 493-500, July 1979, doi:10.1109/TC.1979.1675394
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