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Issue No. 12 - December (vol. 27)
ISSN: 0018-9340

An algebraic construction for q-ary shift register sequences (PDF)

Farhad Hemmati , Department of Electrical Engineering, Illinois Institute of Technology
pp. 1192-1195

IEEE Computer Society (PDF)

pp. c2

An Algorithm for Optimal NAND Cascade Logic Synthesis (Abstract)

C.A. Papachristou , Department of Electrical Engineering, Drexel University
pp. 1099-1111

Generalized Connection Networks for Parallel Processor Intercommunication (Abstract)

C.D. Thompson , Department of Computer Science, Carnegie-Mellon University
pp. 1119-1125

A Stochastic Model for Closed-Loop Preemptive Microprocessor I/O Organizations (Abstract)

J.M. Van Campenhout , Information Systems Laboratory, Department of Electrical Engineering, Stanford University
pp. 1126-1136

A New Double-Rank Realization of Sequential Machines (Abstract)

N. Gaitanis , Digital Systems Laboratory, Computer Center, Nuclear Research Center
pp. 1137-1143

Polylinear Decomposition of Synchronous Sequential Machines (Abstract)

C. Halatsis , Digital Systems Laboratory, Computer Center, Nuclear Research Center
pp. 1144-1152

On Modular Networks Satisfying the Shift-Register Rule (Abstract)

S.P. Kartashev , Department of Computer Science, University of Nebraska
pp. 1153-1176

An Efficient Coordinate Rotation Algorithm (Abstract)

R.F. Eschenbach , Hewlett-Packard Company
pp. 1178-1180

Asymptotic Approximations for the Number of Fanout-Free Functions (Abstract)

E.A. Bender , Department of Mathematics, University of California
pp. 1180-1183

Arithmetic Codes in Residue Number Systems with Magnitude Index (Abstract)

F. Barsi , Istituto di Elaborazione dell'Informazione
pp. 1185-1188

On the Minimization of the Control Store in Microprogrammed Computers (Abstract)

C. Halatsis , Digital Systems Laboratory, Computer Center, Nuclear Research Center
pp. 1189-1192

An Algorithm for Minimal TANT Network Generation (Abstract)

H.-P.S. Lee , Amdahl Corporation
pp. 1202-1206

Fault Detection in Bilateral Arrays of Combinational Cells (Abstract)

F.G. Gray , Department of Electrical Engineering, Virginiblf'lytechnic Institute and State University
pp. 1206-1213

A Set of Invariants Within the Power Spectrum of Unitary Transformations (Abstract)

S. Wendling , Laboratory of Artificial Intelligence, University of Besancon
pp. 1213-1216

Satellite Packet Switching with Global Assignments and Batch Poisson Arrivals (Abstract)

J.W. Mark , Department of Electrical Engineering and Computer Communications Network Group, University of Waterloo
pp. 1216-1221

On the Existence of Combinational Logic Circuits Exhibiting Multiple Redundancy (Abstract)

J.E. Smith , Department of Electrical and Computer Engineering, University of Wisconsin
pp. 1221-1225

Comments on "A Floating Point Multiplexed DDA System" (PDF)

P.G. McCrea , Department of Electrical Engineering Science, University of Essex
pp. 1226

Authors Reply2 (PDF)

G. Hannington , Allen Clark Research Centre, Plessey Co., Ltd.
pp. 1226-1227

Correction to "Static-Hazard-Free T-Gate for Ternary Memory Element and Its Application to Ternary Counters" (PDF)

T. Higuchi , Department of Electronic Engineering, Faculty of Engineering, Tohoku University
pp. 1227

Call for Papers (PDF)

pp. 1227
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